1. Field of the Invention
The invention relates to a method for manufacturing a memory device and, more particularly, to a method for manufacturing a memory device with a shielding metal layer over a memory cell area.
2. Description of the Related Art
An ionization process is an important step in semiconductor fabrication technology and is used as one of back-end processes. For example, an ionization process is used to perform an etching process or a physical vapor deposition (PVD) process.
However, when performing an ionization process, a great quantity of plasma is produced in the chamber of the process apparatus. The plasma usually carries a large amount of charges, causing semiconductor elements to carry charges, which deteriorates stability and reliability of the semiconductor elements.
Taking a memory element as an example, especially for more advanced flash memory (flash RAM) or silicon nitride memory (NROM), memory cells of the memory are formed by floating gate technology. As described above, when performing back-end processes to form a memory element, a great quantity of plasma with a large amount of charges attacks memory cells of the memory element. To go into details, the plasma charges are trapped in memory cells of the memory element, which results in problems to program, write, or read the memory element, further resulting in semiconductor elements with bad stability and reliability.
To sum up, for semiconductor technology it is an important subject to avoid plasma charges being trapped in memory cells of a memory element when performing back-end semiconductor processes, and further increase stability and reliability of the memory element.
In view of the above-mentioned subject, it is therefore an object of the invention to provide a method for manufacturing a memory device that is able to shield plasma charges to avoid the charges being trapped in memory cells.
To achieve the above-mentioned object, a memory device in accordance with the invention includes a memory substrate, an insulating layer, a shielding metal layer, a second dielectric layer and a second metal layer. In the invention, the memory substrate includes a substrate, a memory cell area, a peripheral circuit area, a first dielectric layer and a first metal layer. The memory cell area and the peripheral circuit area are formed on the substrate; the first dielectric layer is formed on the memory cell area and the peripheral circuit area. The first metal layer is formed on the first dielectric layer. The insulating layer is formed on the first dielectric layer not covered with the first metal layer. The shielding metal layer is formed on the insulating layer over the memory cell area. On the shielding metal layer, the insulating layer not covered with the shielding metal layer and the first metal layer not covered with the shielding metal layer and the insulating layer is formed the second dielectric layer. The second metal layer is formed on the second dielectric layer.
In addition, in accordance with another aspect of the invention, the memory substrate further includes a spacer and a barrier layer. In which, the spacer is formed at sides of the first metal layer, while the barrier layer is formed over the first dielectric layer and under the first metal layer and the spacer.
The invention also discloses a method for forming a memory device including steps of providing a memory substrate, depositing an insulating layer, depositing a shielding metal layer, etching the insulating layer and the shielding metal layer, forming a second dielectric layer and forming a second metal layer.
As described above, in accordance with the memory device and manufacturing method thereof of the invention, the shielding metal layer is formed on the insulating layer over the memory cell area. Therefore, the shielding metal layer can shield plasma charges produced when performing back-end semiconductor processes and avoid the plasma charges being trapped in the gate, of the memory cell, thereby increasing stability and reliability of the memory element.